Thin tensile layers in shallow trench isolation and method of making same
作者： Ian R. Post , Kelin J. Kuhn
DOI:
关键词:
摘要: The present invention relates to a method of forming an isolation trench that comprises recess in substrate and film upon the sidewall under conditions cause have tensile load. includes filling with material imparts compressive load oppose is particularly well suited for shallow 0.13 micron geometry range, smaller.
google.com.ar 参考文章(17)
Igor V. Peidous, Shallow trench isolation of MOSFETS with reduced corner parasitic currents ,(1998)
Hyeon-Seag Kim, Sunil D. Mehta, Process for manufacturing shallow trenches filled with dielectric material having low mechanical stress ,(2000)
Mark E. Law, Stephen M. Cea, Continuum based modeling of silicon integrated circuit processing: An object oriented approach Computational Materials Science. ,vol. 12, pp. 289- 308 ,(1998) , 10.1016/S0927-0256(98)00020-2
A. Hamada, T. Furusawa, N. Saito, E. Takeda, A new aspect of mechanical stress effects in scaled MOS devices IEEE Transactions on Electron Devices. ,vol. 38, pp. 895- 900 ,(1991) , 10.1109/16.75220
S. R. Stiffler, Oxidation‐induced substrate strain in advanced silicon integrated‐circuit fabrication Journal of Applied Physics. ,vol. 68, pp. 351- 355 ,(1990) , 10.1063/1.347141
S. M. Hu, Stress‐related problems in silicon technology Journal of Applied Physics. ,vol. 70, ,(1991) , 10.1063/1.349282
P. Smeys, P.B. Griffin, Z.U. Rek, I. De Wolf, K.C. Saraswat, Influence of process-induced stress on device characteristics and its impact on scaled device performance IEEE Transactions on Electron Devices. ,vol. 46, pp. 1245- 1252 ,(1999) , 10.1109/16.766893
Donald Walter Brouillette, Rick Lawrence Mohler, Wolfgang Otto Rauscher, Timothy Charles Krywanczyk, Jerome Brett Lasky, Method of controlling stress in a film ,(1996)
Yu-gyun Shin, Moon-han Park, Sug-hun Hong, Trench isolation methods utilizing composite oxide films ,(1998)
Peter Moon, Payman Aminzadeh, Reza Arghavani, Method for fabricating a transistor with increased hot carrier resistance by nitridizing and annealing the sidewall oxide of the gate electrode ,(1996)