作者: Larry McMurchie , Carl Ebeling
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摘要: Routing FPGAs is a challenging problem because of the relative scarcity routing resources, both wires and connection points. This can lead either to slow implementations caused by long wiring paths that avoid congestion or failure route all signals. paper presents PathFinder, router balances goals performance routability. PathFinder uses an iterative algorithm converges solution in which signals are routed while achieving close optimal allowed placement. Routability achieved forcing negotiate for resource thereby determine signal needs most. Delay minimized allowing more critical greater say this negotiation. Because requires only directed graph describe architecture it adapts readily wide variety FPGA architectures such as Triptych, Xilinx 3000 mesh-connected arrays FPGAs. The results ISCAS benchmarks on Triptych show average increase 4.5% path delay over optimum Routes completion rate than commercial tools, well 11% faster implementations.