System and Method for Testing a Large Memory Area During Processor Design Verification and Validation
作者： Manoj Dusanapudi , Sunil Suresh Hatti , Divya Subbarao Anvekar , Shakti Kapoor , Shubhodeep Roy Choudhury
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摘要: A system and method for replicating a memory block throughout main modifying real addresses within an address translation buffer to reference the replicated blocks during test case set re-executions in order fully is presented. generator generates (multiple cases) along with initial that includes block. executor modifies after each re-execution processor included memory.
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