作者: Edson Borin , Youfeng Wu , Shiliang Hu , Mauricio Breternitz , Cheng C. Wang
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摘要: An apparatus and method is described herein for coupling a processor core of first type with co-designed second type. Execution program code on the monitored hot sections are identified. Those optimize execution core, such that upon subsequently encountering those sections, optimized executed co- designed core. When executing code, may be in low-power state to save power or other parallel. Furthermore, multiple threads cold pipelined while pipeline achieve maximum performance.