Programmable logic device with internal time-constant multiplexing of signals from external interconnect buses

摘要: A method and on-chip architecture are disclosed for multiplexing signals from selected external interconnect buses to chip internal such that bus rerouting can be implemented programmably without substantially affecting timing relations between time-parallel of a rerouted bus. An switch matrix is provided having N input lines crossing with M output provide times crosspoints. plurality less than programmable switches (PIP's) distributed symmetrically among the N·M crosspoints same first number found along each thereby providing equal loading on line. The further second