4-layer 3-D IC technologies for parallel signal processing

摘要: A four-layer 3-D device used for parallel image signal processing was fabricated as an example of a primitive device. SOI (silicon-on-insulator) layers were formed by laser recrystallization. Mesa-type transistors having stacked dielectric gate insulator in recrystallized Si island array. Thermally stable interconnections and contacts realized TiSi/sub x/ wiring x//TiN/TiSi/sub 2//Si-sub. contact structure. For the interlayer connections, x//TiN/W-plug/TiN/TiSi/sub used. The consists following four layers: optical sensor, level-detector, memory, arithmetic logic unit. length is 2 mu m deviation threshold voltage 4 approximately 5.5%. number about 110 K. >