Improved architectures for fused floating-point arithmetic units

作者: Jongwook Sohn

DOI:

关键词:

摘要:

参考文章(30)
A. Beaumont-Smith, N. Burgess, S. Lefrere, C.C. Lim, Reduced latency IEEE floating-point standard adder architectures symposium on computer arithmetic. pp. 35- 42 ,(1999) , 10.1109/ARITH.1999.762826
Peter M. Kogge, Harold S. Stone, A Parallel Algorithm for the Efficient Solution of a General Class of Recurrence Equations IEEE Transactions on Computers. ,vol. C-22, pp. 786- 793 ,(1973) , 10.1109/TC.1973.5009159
Jongwook Sohn, Earl E. Swartzlander, Improved Architectures for a Fused Floating-Point Add-Subtract Unit IEEE Transactions on Circuits and Systems. ,vol. 59, pp. 2285- 2291 ,(2012) , 10.1109/TCSI.2012.2188955
V.G. Oklobdzija, An algorithmic and novel design of a leading zero detector circuit: comparison with logic synthesis IEEE Transactions on Very Large Scale Integration Systems. ,vol. 2, pp. 124- 128 ,(1994) , 10.1109/92.273153
E. Hokenek, R. K. Montoye, Leading-zero anticipator (LZA) in the IBM RISC System/6000 floating-point execution unit Ibm Journal of Research and Development. ,vol. 34, pp. 71- 77 ,(1990) , 10.1147/RD.341.0071
Rong Ji, Zhiqiang Ling, Xianjun Zeng, Bingcai Sui, Liang Chen, Junfeng Zhang, Yingjie Feng, Gang Luo, Comments on "Leading-One Prediction with Concurrent Position Correction" IEEE Transactions on Computers. ,vol. 58, pp. 1726- 1727 ,(2009) , 10.1109/TC.2009.43
Earl E. Swartzlander, H. H. M. Saleh, FFT Implementation with Fused Floating-Point Operations IEEE Transactions on Computers. ,vol. 61, pp. 284- 288 ,(2012) , 10.1109/TC.2010.271
Yao Tao, Gao Deyuan, Fan Xiaoya, Ren Xianglong, Three-Operand Floating-Point Adder computer and information technology. pp. 192- 196 ,(2012) , 10.1109/CIT.2012.58
G. Dimitrakopoulos, D. Nikolos, High-speed parallel-prefix VLSI Ling adders IEEE Transactions on Computers. ,vol. 54, pp. 225- 231 ,(2005) , 10.1109/TC.2005.26
E. Hokenek, R.K. Montoye, P.W. Cook, Second-generation RISC floating point with multiply-add fused IEEE Journal of Solid-state Circuits. ,vol. 25, pp. 1207- 1213 ,(1990) , 10.1109/4.62143