Switched-current analogue-to-digital converter

摘要: A current mode analogue-to-digital converter uses a conversion stage which operates using two-phase clock and requires the input signal to be present during only one of phases. sample-and-hold circuit (120, 130, 135) samples first phase second quantised bit value is generated from mirror held by kickback-free comparator (140). Also residue non-mirrored version current. Optionally, two circuits (140, 140') may used provide two-level quantisation, enabling errors introduced corrected Redundant Signed Digit algorithm. Two pipelines stages (Si’, Si”) can multiplexed double rate.