作者: R. N. Sharma , A. C. Rastogi
DOI: 10.1063/1.355112
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摘要: Thin Y2O3 dielectric films on p‐Si(100) structures prepared by low‐pressure chemical‐vapor deposition show an interfacial growth of a thin SiO2 layer (≊2 nm). Oxygen annealing at 580 °C for 45 min causes further this oxide to ≊8 nm. The silicon has bilayer structure consisting crystalline the side and suboxide SiOx Si interface as revealed line shapes Auger transition Fourier‐transformed infrared spectroscopy studies. as‐deposited film/Si‐based metal‐insulator‐ semiconductor MIS single‐step breakdown with sharp field distribution, whereas O2‐annealed two‐step selective dispersive distribution. do not expected reduction in leakage currents. This is attributed generation defect charge trapping Y2O3/SiO2/Si interface. hysteresis effect observed C‐V curves varied ramping rates shows that nature traps film/Si such electron capture process slower than emission, while reverse true.