On the sensitivity of FPGA architectural conclusions to experimental assumptions, tools, and techniques

摘要: Recent years have seen a tremendous increase in the capacities and capabilities of Field-Programmable Gate Arrays (FPGA's). Much this dramatic improvement has been result changes to FPGAs' internal architectures. New architectural proposals are routinely generated both academia industry. For FPGA's continue grow, it is important that these new ideas fairly accurately evaluated, so those worthy can be included future chips. Typically, evaluation done using experimentation. However, use experimentation dangerous, since requires making assumptions regarding tools architecture device question. If not accurate, conclusions from experiments may meaningful. In paper, we investigate sensitivity FPGA experimental variations. To make our study concrete, evaluate four previously published well-known results: lookup-table size, switch block topology, cluster memory size. It shown significantly affected by assumptions, tools, techniques used experiments.