作者: Ying-Jui Chen , S. Oraintara , T.D. Tran , K. Amaratunga , T.Q. Nguyen
关键词:
摘要: This letter describes an algorithm for systematically finding a multiplierless approximation of transforms by replacing floating-point multipliers with VLSI-friendly binary coefficients the form k/2/sup n/. Assuming cost hardware shifters is negligible, total number adders employed to approximate transform can be regarded as index complexity. Because new more systematic and faster than trial-and-error approximations adder constraint, it much efficient design tool. Furthermore, not limited specific transform; various discrete cosine are presented examples its versatility.