Adopting Decision Tree Based Policy Enforcement Mechanism to Protect Reconfigurable Devices
作者： Mario Barbareschi , Antonino Mazzeo , Salvatore Miranda
DOI: 10.1007/978-3-319-39345-2_7
关键词:
摘要: The Field Programmable Gate Array technology invaded the electronic market by offering economic advantages and many attractive features, such as possibility to dynamically reprogram hardware configuration in field. However, FPGA devices are not free of secure drawbacks, which include install third-party components may damage system on they hosted. In this paper, we devise a policy enforcement mechanism monitor control access installed component design it employing Decision Trees. We demonstrate, with significant experimental setup conducted commercial device, namely Xilinx Zynq-7020, efficacy DT based enforcer.
springer.com
sci-hub.st 参考文章(20)
Mario Barbareschi, Antonino Mazzeo, Antonino Vespoli, Network Traffic Analysis Using Android on a Hybrid Computing Architecture Algorithms and Architectures for Parallel Processing. pp. 141- 148 ,(2013) , 10.1007/978-3-319-03889-6_16
T Huffmire, S Prasad, T Sherwood, R Kastner, Threats and Challenges in Reconfigurable Hardware Security ERSA. pp. 334- 345 ,(2008) , 10.21236/ADA511928
Viktor K. Prasanna, Yun R. Qu, Shijie Zhou, High-performance architecture for dynamically updatable packet classification on FPGA architectures for networking and communications systems. pp. 125- 136 ,(2013) , 10.5555/2537857.2537882
Alessandro Cilardo, New Techniques and Tools for Application-Dependent Testing of FPGA-Based Components IEEE Transactions on Industrial Informatics. ,vol. 11, pp. 94- 103 ,(2015) , 10.1109/TII.2014.2370532
Alessandro Cilardo, Luca Gallo, Nicola Mazzocca, Design space exploration for high-level synthesis of multi-threaded applications Journal of Systems Architecture. ,vol. 59, pp. 1171- 1183 ,(2013) , 10.1016/J.SYSARC.2013.08.005
Alessandro Cilardo, Mario Barbareschi, Antonino Mazzeo, Secure distribution infrastructure for hardware digital contents Iet Computers and Digital Techniques. ,vol. 8, pp. 300- 310 ,(2014) , 10.1049/IET-CDT.2014.0036
Flora Amato, Angelo Chianese, Vincenzo Moscato, Antonio Picariello, Giancarlo Sperli, SNOPS: a smart environment for cultural heritage applications web information and data management. pp. 49- 56 ,(2012) , 10.1145/2389936.2389947
K. Pagiamtzis, A. Sheikholeslami, Content-Addressable Memory (CAM) Circuits and Architectures: A Tutorial and Survey IEEE Journal of Solid-State Circuits. ,vol. 41, pp. 712- 727 ,(2006) , 10.1109/JSSC.2005.864128
Mario Barbareschi, Ermanno Battista, Nicola Mazzocca, Sridhar Venkatesan, A hardware accelerator for data classification within the sensing infrastructure information reuse and integration. pp. 400- 405 ,(2014) , 10.1109/IRI.2014.7051917
Roel Maes, Dries Schellekens, Ingrid Verbauwhede, A Pay-per-Use Licensing Scheme for Hardware IP Cores in Recent SRAM-Based FPGAs IEEE Transactions on Information Forensics and Security. ,vol. 7, pp. 98- 108 ,(2012) , 10.1109/TIFS.2011.2169667