Current-mode algorithmic analog-to-digital converters
作者： D.G. Nairn , C.A.T. Salama
DOI: 10.1109/4.58292
关键词:
摘要: A current-mode technique for the design of algorithmic analog-to-digital converters (ADCs) is presented. The allows necessary voltage swing a given dynamic range to be reduced while at same time eliminating need large capacitors on which store signal. Consequently, resulting ADCs can made very small and yet still capable providing high sampling rates. advantages disadvantages different current mirror structures use in are discussed. Experimental results fabricated using 3- mu m CMOS process reported, including an 8-b ADC displayed rate 500 kHz total circuit area under 0.75 mm/sup 2/. >
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