作者: Ji Hun Kim
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摘要: The static power consumption became one of the key limiting factors on shrinkage feature size VLSI circuit using CMOS technology. One major reason high is off-state sub-threshold leakage current transistor. At room temperature, possible steepest swing (SS) for turning off transistor, limited to 60 mV/decade due a constant fundamental thermal dynamical limit (kBT/q) that not scalable with reduced dimension. This limitation inherent because its governed by thermally activated diffusive over potential gate-controlled barrier. Completely different switching mechanism such as mechanical degree freedom necessary break SS limit. Previous studies nano-electro-mechanical-system (NEMS) have shown suspended-gate MOSFET (SG-MOSFET) logical switch, while we previously proposed suspended nanowire (NW) channel FET (NEMFET) low pull-in voltage(Vpi) and Ion/Ioff ratio flexibility nanowires. Here report first demonstration NEMFET device Ge/Si core/shell channel. local metal gate air gap thickness defined supporting source/drain electrodes. DC transfer characteristics multiple demonstrates close-to-zero (<6mV) at temperature slope only measurement equipment resolution. Furthermore, employed electrostatic actuation study AC response Using signal mixer characterized resonant frequency speed be 125.9 MHz