Fault-Tolerant Training Enabled by On-Line Fault Detection for RRAM-Based Neural Computing Systems

作者: Lixue Xia , Mengyun Liu , Xuefei Ning , Krishnendu Chakrabarty , Yu Wang

DOI: 10.1109/TCAD.2018.2855145

关键词:

摘要: An resistive random-access memory (RRAM)-based computing system (RCS) is an attractive hardware platform for implementing neural algorithms. On-line training RCS enables hardware-based learning a given application and reduces the additional error caused by device parameter variations. However, high occurrence rate of hard faults due to immature fabrication processes limited write endurance restrict applicability on-line RCS. We propose fault-tolerant method that alternates between fault-detection phase phase. In phase, quiescent-voltage comparison utilized. threshold-training remapping scheme proposed. Our results show that, compared without fault tolerance, recognition accuracy Cifar-10 dataset improves from 37% 83% when using low-endurance RRAM cells, 63% 76% cells with but percentage initial faults.

参考文章(40)
M. Mitchell Waldrop, The chips are down for Moore's law. Nature. ,vol. 530, pp. 144- 147 ,(2016) , 10.1038/530144A
Lixue Xia, Boxun Li, Tianqi Tang, Peng Gu, Xiling Yin, Wenqin Huangfu, Pai-Yu Chen, Shimeng Yu, Yu Cao, Yu Wang, Yuan Xie, Huazhong Yang, MNSIM: Simulation platform for memristor-based neuromorphic computing system design, automation, and test in europe. pp. 469- 474 ,(2016) , 10.3850/9783981537079_0549
Miao Hu, John Paul Strachan, Zhiyong Li, Emmanuelle M. Grafals, Noraica Davila, Catherine Graves, Sity Lam, Ning Ge, Jianhua Joshua Yang, R. Stanley Williams, Dot-product engine for neuromorphic computing: programming 1T1M crossbar to accelerate matrix-vector multiplication design automation conference. pp. 19- ,(2016) , 10.1145/2897937.2898010
Karsten Beckmann, Josh Holt, Harika Manem, Joseph Van Nostrand, Nathaniel C. Cady, Nanoscale Hafnium Oxide RRAM Devices Exhibit Pulse Dependent Behavior and Multi-level Resistance Capability MRS Advances. ,vol. 1, pp. 3355- 3360 ,(2016) , 10.1557/ADV.2016.377
Ligang Gao, Pai-Yu Chen, Shimeng Yu, Demonstration of Convolution Kernel Operation on Resistive Cross-Point Array IEEE Electron Device Letters. ,vol. 37, pp. 870- 873 ,(2016) , 10.1109/LED.2016.2573140
Ping Chi, Shuangchen Li, Cong Xu, Tao Zhang, Jishen Zhao, Yongpan Liu, Yu Wang, Yuan Xie, PRIME: a novel processing-in-memory architecture for neural network computation in ReRAM-based main memory international symposium on computer architecture. ,vol. 44, pp. 27- 39 ,(2016) , 10.1145/3007787.3001140
Ali Shafiee, Anirban Nag, Naveen Muralimanohar, Rajeev Balasubramonian, John Paul Strachan, Miao Hu, R. Stanley Williams, Vivek Srikumar, ISAAC: a convolutional neural network accelerator with in-situ analog arithmetic in crossbars international symposium on computer architecture. ,vol. 44, pp. 14- 26 ,(2016) , 10.1145/3007787.3001139
Shimeng Yu, Zhiwei Li, Pai-Yu Chen, Huaqiang Wu, Bin Gao, Deli Wang, Wei Wu, He Qian, Binary neural network with 16 Mb RRAM macro chip for classification and online training international electron devices meeting. ,(2016) , 10.1109/IEDM.2016.7838429
Krishnendu Chakrabarty, Yuan Xie, Yu Wang, Huazhong Yang, Wenqin Huangfu, Lixue Xia, Ming Cheng, Xiling Yin, Tianqi Tang, Boxun Li, Computation-oriented fault-tolerance schemes for RRAM computing systems asia and south pacific design automation conference. pp. 794- 799 ,(2017) , 10.1109/ASPDAC.2017.7858421
Tianqi Tang, Lixue Xia, Boxun Li, Yu Wang, Huazhong Yang, Binary convolutional neural network on RRAM asia and south pacific design automation conference. pp. 782- 787 ,(2017) , 10.1109/ASPDAC.2017.7858419