作者: David A. Bader , Kamesh Madduri
DOI: 10.1007/978-3-540-30474-6_34
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摘要: This paper summarizes the design and implementation of a parallel algorithm for state assignment large Finite State Machines (FSMs) High performance CAD tools are necessary to overcome computational complexity involved in optimization sequential circuits FSMs constitute an important class logic circuits, is one key steps combinational The SMP-based – based on program JEDI targeting multilevel scales nearly linearly with number processors varying problem sizes chosen from standard benchmark suites while attaining quality results comparable best algorithms.