作者: E Simoen , M -H Gao , J -P Colinge , C Claeys
DOI: 10.1088/0268-1242/8/3/021
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摘要: The effects of the application channel hot-carrier (CHC) stress applied at 42 K to SOI nMOS transistors are investigated. A reduction threshold voltage is observed for typical stressing conditions, while simultaneously maximum transconductance increases. Similar changes can be obtained nearly immediately by applying a strong pulse into multiplication, i.e. pulsing drain beyond kink. At 4.2 this 'low'-threshold-voltage (VT) state metastable. These phenomena explained considering hole trapping in frozen-out film yielding depletion charge and an increase potential. This results VT transverse electric field. Due slow re-emission steep forward diode characteristic, trapped will remain considerable time film, explaining metastability hole-trapping-induced low-VT K.