作者: Fan Shuo
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摘要: Provided are an analog-to-digital conversion circuit and method, comprising: in a sampling phase, first capacitor array connects lower plates of N capacitors to input voltage, other common mode upper all the voltage sample being positive integer smaller than total number (S501); i-th logic controls plate connect reference or ground according stored flag bit, so that magnitude comparison output by approaches second (S502); comparator stores result between i+1th bit circuit, analog digital is completed when i+1 equal (S503). The dynamic range can be expanded without changing voltage.