Method for automatically searching for functional defects in a description of a circuit

作者: Robert Kristianto Mardjuki , Tai An Ly , Lawrence Curtis Widdoes , David Lansing Dill , Paul Andrew Wilcox

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摘要: A programmed computer searches for functional defects in a description of circuit undergoing verification the following manner. The simulates behavior response to test vector, automatically restores state simulation without causing pass through reset state, and then another vector. predetermined rule can be used identify vectors simulated, depend upon measure verification, including number times during when first transition is performed by controller at same time as second controller. During vectors, manually generated tests or checkers monitor portions defective behavior.

参考文章(97)
Jean François Santucci, Anne-lise Courbis, Norbert Giambiasi, Speed up of behavioral A.T.P.G. using a heuristic criterion Proceedings of the 30th international on Design automation conference - DAC '93. pp. 92- 96 ,(1993) , 10.1145/157485.164587
B. Sarikaya, G.v. Bochmann, E. Cerny, A Test Design Methodology for Protocol Testing IEEE Transactions on Software Engineering. ,vol. 13, pp. 518- 531 ,(1987) , 10.1109/TSE.1987.233197
Alberto L. Sangiovanni-Vincentelli, Patrick C. McGeer, Alexander Saldanha, Verification of electronic systems design automation conference. pp. 106- 111 ,(1996) , 10.1145/240518.240539
Randal E. Bryant, Binary decision diagrams and beyond: enabling technologies for formal verification international conference on computer aided design. pp. 236- 243 ,(1995) , 10.5555/224841.225047
A.K. Chandra, V.S. Iyengar, R.V. Jawalekar, M.P. Mullen, I. Nair, B.K. Rosen, Architectural verification of processors using symbolic instruction graphs international conference on computer design. pp. 454- 459 ,(1994) , 10.1109/ICCD.1994.331949
Tony Stornetta, Forrest Brewer, Implementation of an efficient parallel BDD package design automation conference. pp. 641- 644 ,(1996) , 10.1145/240518.240639
E. M. Clarke, O. Grumberg, K. L. McMillan, X. Zhao, Efficient Generation of Counterexamples and Witnesses in Symbolic Model Checking design automation conference. pp. 427- 432 ,(1995) , 10.1145/217474.217565
Aharon Aharon, Dave Goodman, Moshe Levinger, Yossi Lichtenstein, Yossi Malka, Charlotte Metzger, Moshe Molcho, Gil Shurek, Test program generation for functional verification of PowerPC processors in IBM design automation conference. pp. 279- 285 ,(1995) , 10.1145/217474.217542
A.J. Daga, W.P. Birmingham, A symbolic-simulation approach to the timing verification of interacting FSMs international conference on computer design. pp. 584- 589 ,(1995) , 10.1109/ICCD.1995.528927