Repairable chip bonding/interconnect process

摘要: A repairable, chip-to-board interconnect process which addresses cost and testability issues in the multi-chip modules. This can be carried out using a chip-on-sacrificial-substrate technique, involving laser processing. avoids curing/solvent evolution problems encountered prior approaches, as well is resolving plating requirements for fillets. For repairable high speed connection, transmission lines formed on sides of chip from bond pads, ending gull wing at bottom subsequent solder.