Dual threshold voltage and low swing domino logic circuits
作者： Volkan Kursun , Eby G. Friedman
DOI:
关键词:
摘要: A domino logic circuit is configured to reduce power consumption. In a first embodiment, sleep switch (216) grounds the dynamic node (128) during mode. second low-swing (930) at output reduces and keeper transistor gate voltage swings. third embodiment combines those two techniques.
lens.org 参考文章(17)
Sathyanandan Rajivan, Raoul B. Salem, Parametric tuning of an integrated circuit after fabrication ,(1996)
Daniel Lawrence Stasiak, David Howard Allen, Method and apparatus for controlling both active and standby power in domino circuits ,(2001)
Patrick W. Bosshart, Dynamic multiplexer circuits, systems, and methods having three signal inversions from input to output ,(1998)
Stephen V. Kosonocky, Norman J. Rohrer, Kerry Bernstein, Edward J. Nowak, Kevin J. Nowka, Peter E. Cottrell, David Meltzer, Body-contacted and double gate-contacted differential logic circuit and method of operation ,(2001)
J. Tschanz, S. Narendra, R. Nair, V. De, Effectiveness of adaptive supply voltage and body bias for reducing impact of parameter variations in low power and high performance microprocessors symposium on vlsi circuits. pp. 310- 311 ,(2002) , 10.1109/VLSIC.2002.1015112
A. Keshavarzi, S. Narendra, B. Bloechel, S. Borkar, V. De, Forward body bias for microprocessors in 130nm technology generation and beyond symposium on vlsi circuits. pp. 312- 315 ,(2002) , 10.1109/VLSIC.2002.1015113
David R. Hanson, Gerhard Mueller, Toshiaki Kirihata, Method of reducing sub-threshold leakage in circuits during standby mode ,(2001)
Ali Keshavarzi, Siva Narendra, Shekhar Borkar, Charles Hawkins, Kaushik Roy, Vivek De, Technology scaling behavior of optimum reverse body bias for standby leakage power reduction in CMOS IC's international symposium on low power electronics and design. pp. 252- 254 ,(1999) , 10.1145/313817.313937
Mohamed I. Elmasry, Mohamed W. Allam, Mohab H. Anis, High-speed dynamic logic styles for scaled-down CMOS and MTCMOS technologies Proceedings of the 2000 international symposium on Low power electronics and design - ISLPED '00. pp. 155- 160 ,(2000) , 10.1145/344166.344562
I.S. Hwang, A.L. Fisher, Ultrafast compact 32-bit CMOS adders in multiple-output domino logic IEEE Journal of Solid-state Circuits. ,vol. 24, pp. 358- 369 ,(1989) , 10.1109/4.18596