作者: Jente B. Kuang , Rajiv V. Joshi , Hung C. Ngo , Kevin J. Nowka
DOI:
关键词: Threshold voltage 、 Leakage (electronics) 、 Voltage 、 Engineering 、 Power consumption 、 Voltage optimisation 、 Circuit architecture 、 Electronic engineering 、 Data signal 、 Control circuit
摘要: A low power consumption pipeline circuit architecture has partitioned stages. The first stage is non-power-gated for fast response in processing input data after receipt of a valid signal. power-gated second two modes. Normally the rail charged to voltage potential supply. In gated mode, threshold below reduce leakage. decoupled from potential. third its either coupled or where charges before stage.