作者: Takayuki Ikeoku , Kenji Namba , Ryu Hasunuma
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摘要: An impedance calibration circuit for a serial ATA (SATA) transmitter has resistor in series with each leg of the differential output transmitter. array selectable resistors is parallel resistors. Resistors are selected to be A utilizes comparator determine when minimum error reached. Offset errors compensated by which determines center alternate ones and zeros generated input signals within offset comparator, should point calibration.