Automatically Mapping Code on an Intelligent Memory Architecture

Jaejin Lee Lee , Yan Solihin , Josep Torrellas
high performance computer architecture 121

2001
A SnuCL implementation of the LINPACK benchmark on clusters with multi-GPU nodes

Jeongho Nah , Gangwon Jo , Jaejin Lee , Jun Lee
ieee international conference on high performance computing data and analytics 35

2
2012
Automatic OpenCL work-group size selection for multicore CPUs

Sangmin Seo , Gangwon Jo , Jaejin Lee , Jun Lee
international conference on parallel architectures and compilation techniques 387 -398

23
2013
Hiding Relaxed Memory Consistency with Compilers

David A. Padua , Jaejin Lee
international conference on parallel architectures and compilation techniques 111 -122

31
2000
Helper thread prefetching for loosely-coupled multiprocessor systems

Yan Solihin , Changhee Jung , Daeseob Lim , Jaejin Lee
international parallel and distributed processing symposium 140 -140

31
2006
Translating OpenMP device constructs to OpenCL using unnecessary data transfer elimination

Jaejin Lee , Jungho Park , Yong-Jun Lee , Junghyun Kim
ieee international conference on high performance computing data and analytics 51

7
2016
CyCNN: A Rotation Invariant CNN using Polar Mapping and Cylindrical Convolution Layers

Jaejin Lee , Hyungmo Kim , Jinpyo Kim , Wooekun Jung
arXiv: Computer Vision and Pattern Recognition

27
2020
FA3C: FPGA-Accelerated Deep Reinforcement Learning

Hyungmin Cho , Pyeongseok Oh , Jiyoung Park , Wookeun Jung
architectural support for programming languages and operating systems 499 -513

47
2019
An automatic code overlaying technique for multicores with explicitly-managed memory hierarchies

Choonki Jang , Jun Lee , Sangmin Seo , Jaejin Lee
symposium on code generation and optimization 219 -229

2012
Concurrent Static Single Assignment Form and Constant Propagation for Explicitly Parallel Programs

Jaejin Lee , Samuel P. Midkiff , David A. Padua
languages and compilers for parallel computing 114 -130

82
1997
Dynamic scratchpad memory management for code in portable systems with an MMU

Bernhard Egger , Jaejin Lee , Heonshik Shin
ACM Transactions in Embedded Computing Systems 7 ( 2) 11

42
2008
Code Generation for a Dual Instruction Set Processor Based on Selective Code Transformation

Sheayun Lee , Jaejin Lee , Sang Lyul Min , Jason Hiser
software and compilers for embedded systems 33 -48

18
2003
Compiler-directed soft error resilience for lightweight GPU register file protection

Hongjune Kim , Jianping Zeng , Qingrui Liu , Mohammad Abdel-Majeed
programming language design and implementation 989 -1004

2
2020
Demand Paging Techniques for Flash Memory Using Compiler Post-Pass Optimizations

Seungkyun Kim , Kiwon Kwon , Chihun Kim , Choonki Jang
ACM Transactions on Embedded Computing Systems 10 ( 4) 1 -29

8
2011
Fast and space-efficient virtual machine checkpointing

Eunbyung Park , Bernhard Egger , Jaejin Lee
ACM SIGPLAN Notices 46 ( 7) 75 -86

3
2011
POSTER: MAPA: An Automatic Memory Access Pattern Analyzer for GPU Applications

Gangwon Jo , Jaehoon Jung , Jiyoung Park , Jaejin Lee
acm sigplan symposium on principles and practice of parallel programming 52 ( 8) 443 -444

2017
Scratchpad Memory Management Techniques for Code in Embedded Systems without an MMU

Bernhard Egger , Seungkyun Kim , Choonki Jang , Jaejin Lee
IEEE Transactions on Computers 59 ( 8) 1047 -1062

28
2010
Hydra: A Block-Mapped Parallel Flash Memory Solid-State Disk Architecture

Yoon Jae Seong , Eyee Hyun Nam , Jin Hyuk Yoon , Hongseok Kim
IEEE Transactions on Computers 59 ( 7) 905 -921

85
2010
Efficient Checkpointing of Live Virtual Machines

Bernhard Egger , Younghyun Cho , Changyeon Jo , Eunbyun Park
IEEE Transactions on Computers 65 ( 10) 3041 -3054

4
2016