Method of Plating Through Wafer Vias in a Wafer for 3D Packaging

作者: Yann Pierre Roger Lamy , Freddy Roozeboom , Willem Frederik Adrianus Besling

DOI:

关键词: Embedded Wafer Level Ball Grid ArrayPlatingElectronic engineeringMaterials scienceLayer (electronics)Wafer testingWaferDie (integrated circuit)Die preparationOptoelectronicsWafer backgrinding

摘要: Therefore, a method of plating wafer via holes in is provided. A substrate (200) having first and second side plurality (210) Each hole comprises end extending between the side. seed layer (220) deposited on 5 (200). foil (250) applied closing ends (210). The electro-chemically plated removed.

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