作者: Kian Hong Lim , Jianbo Yang , Ling Wu , Sung Mun Jung
DOI:
关键词: Computer hardware 、 Memory cell 、 Physics 、 Common source line 、 Word (computer architecture) 、 Process (computing) 、 Front end of line 、 Optoelectronics 、 Substrate (printing) 、 Source lines 、 Memory array
摘要: Devices and methods for forming a device are disclosed. The method includes providing substrate having memory array region. Front end of line (FEOL) process is performed to form components cell pairs. FEOL forms storage gates, access gates or word lines, source/drain regions, spacers, erase source isolation dielectrics. pair shares common (SL). A SL strap opening provided. formed between adjacent pair. does not overlap the gate cell.