Design and Implementation of the POWER6 Microprocessor

摘要: The IBM POWER6 processor is a dual-core, 341 mm2, 790 million transistor chip fabricated using IBM's 65 nm partially-depleted SOI process. Capable of running at frequencies up to 5 GHz in high performance applications, it can also operate under 100 W for power-sensitive applications. Traditional power-intensive and deep-pipelining techniques used frequency design were abandoned favor more power efficient circuit methodologies. complexity size POWER6, together with its operating frequency, presented number significant challenges multi-site team complete the on an aggressive schedule. This paper describes some methodology implementation innovations development particular emphasis custom, synthesized, register file SRAM design, as well electrical characterizations performed lab.