A Scalable and Parallel Test Access Strategy for NoC-Based Multicore System
作者： Taewoo Han , Inhyuk Choi , Hyunggoy Oh , Sungho Kang
DOI: 10.1109/ATS.2014.26
关键词: Multi-core processor 、 Embedded system 、 Scalability 、 System on a chip 、 Routing (electronic design automation) 、 Test strategy 、 Overhead (computing) 、 Parallel computing 、 Computer science 、 Single-core 、 Bandwidth (signal processing)
摘要: This paper proposes a new parallel test access strategy for multiple identical cores in network-on-chip (NoC). The proposed takes advantage of the regular design NoC to reduce both area overhead and time. reused mechanism (TAM) adopted pipelining structure deterministic data routing algorithm order reuse full bandwidth links NoC. Also, architecture has complete scalability according number applications 3D environment are also represented. Experimental results show that TAM can with same time as single core negligible hardware overhead.
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