作者: Zhan Ma , Hao Hu , Yao Wang
关键词: Computer hardware 、 Clock rate 、 Decoding methods 、 ARM architecture 、 Computer science 、 Dynamic voltage scaling 、 Efficient energy use 、 Pentium 、 Frequency scaling
摘要: This paper proposes a new complexity model for H.264/AVC video decoding. The is derived by decomposing the entire decoder into several decoding modules (DM), and identifying fundamental operation unit (termed or CU) in each DM. of DM modeled product average one CU number CUs required. shown to be highly accurate software both on Intel Pentium mobile 1.6-GHz ARM Cortex A8 600-MHz processors, over variety contents at different spatial temporal resolutions bit rates. We further show how use this predict required clock frequency hence perform dynamic voltage scaling (DVFS) energy efficient evaluate achievable power savings platforms, using analytical models these two platforms as well real experiments with ARM-based TI OMAP35x EVM board. Our study shows that platform where dominates, saving factor 3.7 possible. For processor static leakage not negligible, 2.22 still achievable.