作者: Wen-Hao Lee , Wei-Ren Chen , Te-Hsun Hsu
DOI:
关键词: Gate voltage 、 Gate oxide 、 Electrical engineering 、 Voltage 、 Line (electrical engineering) 、 Second source 、 PMOS logic 、 Materials science 、 Transistor 、 Non-volatile memory
摘要: An erasable programmable single-poly nonvolatile memory includes a substrate structure; first PMOS transistor comprising select gate, source/drain region, and second wherein the gate is connected to voltage, region source line voltage; third floating bit voltage first, regions are constructed in N-well region; an erase adjacent comprises n-type P-well formed structure.