Erasable programmable single-ploy nonvolatile memory

作者: Wen-Hao Lee , Wei-Ren Chen , Te-Hsun Hsu

DOI:

关键词: Gate voltageGate oxideElectrical engineeringVoltageLine (electrical engineering)Second sourcePMOS logicMaterials scienceTransistorNon-volatile memory

摘要: An erasable programmable single-poly nonvolatile memory includes a substrate structure; first PMOS transistor comprising select gate, source/drain region, and second wherein the gate is connected to voltage, region source line voltage; third floating bit voltage first, regions are constructed in N-well region; an erase adjacent comprises n-type P-well formed structure.

参考文章(40)
Alexander Kalnitsky, Yun Yue, Edgardo Laber, Hosam Haggag, Michael D. Church, Memory array of floating gate-based non-volatile memory cells ,(2011)
Tzeng-Huei Shiau, Han-Chih Lin, Alex Wang, Hsien-Wen Liu, Shang-De Ted Chang, I-Sheng Liu, Nonvolatile memory solution using single-poly pflash technology ,(2004)
Todd E. Humes, Christopher J. Diorio, John D. Hyde, Carver A. Mead, Pseudo-nonvolatile direct-tunneling floating-gate device ,(2003)
Wolfram Langheinrich, Mayk Roehrich, Robert Strenz, Robert Wiesner, Memory cell arrangement, method for controlling a memory cell, memory array and electronic device ,(2008)
Ching-Sung Yang, Shih-Jye Shen, Ching-Hsiang Hsu, Single-poly EEPROM ,(2002)
Rebecca Shult, J. Peter Fasse, The United States Patent & Trademark Office's Current View on Patent Eligibility Industrial Biotechnology. ,vol. 10, pp. 156- 158 ,(2014) , 10.1089/IND.2014.1517
Ching-Sung Yang, Shih-Jye Shen, Ching-Hsiang Hsu, Single poly embedded eprom ,(2002)
Shang-De Ted Chang, Jayson Giai Trinh, PMOS flash EEPROM cell with single poly ,(1995)