作者: Tzeng-Huei Shiau , Han-Chih Lin , Alex Wang , Hsien-Wen Liu , Shang-De Ted Chang
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摘要: A single-poly two-transistor PMOS memory cell for multiple-time programming applications includes a floating gate transistor sharing drain/source P+ diffusion region with select all formed within first n-well. control plate the is in second two-transitor one-time having source as p+ single The adapted to also serve transistor.