Nonvolatile pmos two transistor memory cell and array
作者： Vikram Kowshik , Andy Teng Feng Yu , Shang-De Ted Chang , Nader Radjy
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摘要: A nonvolatile memory array has a plurality of PMOS two transistor (2T) cells. Each 2T cell (40) includes floating gate (40a) and select (40b) is connected between bit line common source line. The the control each in row are to word line, respectively. cells programmed using combination FN tunneling BTBT induced hot electron injection, erased tunneling. In some embodiments, divided into sectors, where sector defined by an n-well region predetermined number rows Here, coupled sector. other lines segmented along boundaries.
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