Nonvolatile memory cell structure with assistant gate and memory array thereof
作者： Mu-Ying Tsao , Wei-Ren Chen
DOI:
关键词: Cell structure 、 Line (electrical engineering) 、 Word (computer architecture) 、 Bit line 、 Memory array 、 Transistor 、 PMOS logic 、 Electrical engineering 、 Non-volatile memory 、 Engineering
摘要: An NVM array includes a plurality of cells, word lines extending along first direction, bit second and source lines. Each the cells PMOS select transistor floating gate serially connected to transistor. line is electrically doping region each cells.
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