Method for making a lead-on-chip semiconductor device having peripheral bond pads
作者： James J. Casto , Michael B. McShane , David D. Afshar , Charles G. Bigler
DOI:
关键词: Electronic engineering 、 Wire bonding 、 Bar (music) 、 Semiconductor device 、 Chip 、 Lead on chip 、 Semiconductor chip 、 Optoelectronics 、 Electrical conductor 、 Clamping 、 Materials science
摘要: A semiconductor device (10) has a lead-on-chip (LOC) configuration. Leads (24) of the have central portions (36) which are electrically coupled to peripheral bond pads (14) by conductive wires (30). Inner (38) leads extend from toward centerline A--A for improved adhesion and provide an internal clamping area (41) stabilizes during wire bonding. In one embodiment, tie bar (22) leadframe (16) is used distribute power across chip (12). The may also include alignment features (50) tape (52) align (12) insulating (18) leadframe, respectively.
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