Structure of Metal Interconnect and Fabrication Method Thereof
作者： Pei-Yu Chou , Chun-jen Huang
DOI:
关键词: Etching (microfabrication) 、 Electrical conductor 、 Fabrication 、 Metal interconnect 、 Interconnection 、 Electronic engineering 、 Layer (electronics) 、 Substrate (printing) 、 Dielectric layer 、 Materials science 、 Optoelectronics
摘要: A process and structure for a metal interconnect includes providing substrate with first electric conductor, forming dielectric layer patterned hard mask, using the mask to form opening second as an etching etch stop third conductor.
glgoo.top参考文章(14)
Tri-Rung Yew, Yimin Huang, Method of patterning dielectric 專利權人：United Microelectronics Corp., Hsinchu, Taiwan. ,(1998)
Liming Tsau, High density metal capacitor using dual-damascene copper interconnect ,(2001)
Li-chih Chao, Ming-Huei Lui, Chao-Cheng Chen, Chia-Shiung Tsai, Jen-Cheng Liu, Dual damascene process for carbon-based low-K materials ,(1999)
Tue Nguyen, Sheng Teng Hsu, Low resistance contact between integrated circuit metal levels and method for same ,(1997)
Chia Shiung Tsai, Yuan-Chang Huang, Chen-Hua Yu, 0.3 Micron aperture width patterning process ,(1996)
Syun-Ming Jang, Chen-Hua Yu, Dual damascene patterned conductor layer formation method without etch stop layer ,(1998)
Wei-Ray Lin, Method of forming a capacitor and a contact plug ,(2000)
Chin-Chang Cheng, Ruth A. Brain, Valery M. Dubin, Makarem Hussein, Phi L. Nguyen, Interconnect structures containing conductive electrolessly deposited etch stop layers, liner layers, and via plugs ,(2003)
Cindy K. Goldberg, Yeong-Jyn T. Lii, Interconnect structure and method for forming ,(2003)
Ian Harvey, Oxide etch stop techniques for uniform damascene trench depth ,(1997)