A low-impedance, sub-bandgap 0.6 μm CMOS reference with 0.84% trimless 3-σ accuracy and -30 dB worst-case PSRR up to 50 MHz

作者: Vishal Gupta , Gabriel A Rincón-Mora , None

DOI: 10.1007/S10470-009-9364-0

关键词: RippleBand gapVoltage referenceCMOSElectronic engineeringHeadroom (audio signal processing)TrimmingPower supply rejection ratioVoltageEngineering

摘要: Modern mobile applications demand high performance from low supply voltages to reduce power (extend battery life) and survive breakdown (imposed by sub-micron CMOS technologies), which is why precise low-impedance sub-bandgap references (below 1.2 V) that are independent of process, package stress, supply, load, temperature critical. However, improving dc accuracy trimming requires test time (cost) in production dynamic-element matching (DEM) introduces switching noise. Additionally, ac rejecting ripple with cascodes increases headroom requirements shunting coupled noise series buffers temperature-sensitive offsets degrade accuracy. This paper presents a prototyped 0---5 mA, 890 mV, low-impedance, 0.6 μm reference trimless 3-σ unloaded 0.84% across -40 125°C (2.74% when loaded 0---5 mA supplied 1.8 3 V) worst-case power-supply rejection (PSRR) -30 dB up 50 MHz. The design adopts low-cost, noise-free, self-selecting Survivor scheme automatically select the best pair devices among bank similar pairs during start-up (or power-on reset) use them for critical functions circuit. A compact, low-voltage, charge-pumped cascoding strategy bandgap-embedded shunt-feedback loop suppress

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