Methodology for developing product-specific interlayer dielectric polish processes

摘要: A method for developing and characterizing a polish process polishing an interlayer dielectric (ILD) layer specific product or patterned metal is provided. statistically-based model ILD planarization by chemical mechanical (CMP) used as guide to determine, in empirical manner, the proper amount of that will be required planarize layer. The also shows resulting thicknesses expected. By relating blank test wafer polished maximum oxide removed from field areas die total indicated range across die, deposition thickness can adjusted attain desired planarized thickness. attainment local planarity, however, must confirmed independent measurement technique. development methodology extendible with respect minimum interconnect feature size. This applied products requiring multiple planarizations levels interconnects.