Semiconductor memory device and fabrication thereof
作者： Kazuhiro Tasaka
DOI:
关键词:
摘要: A semiconductor memory device, comprising a substrate of first conductivity type, plurality diffusion regions in which atoms dopant second type opposite to the are diffused, being disposed and spaced one after another define channel between two adjacent regions, defining boundaries each with gate oxide on channels; word lines extending orthogonal direction extend further wherein cover side surface portions lower portion region left substantially uncovered by regions.
lens.org 参考文章(20)
Byoung I. Lee, Method for fabrication mask ROM ,(1993)
Donald M. Kenney, Vertical epitaxial SOI transistor, memory cell and fabrication methods ,(1992)
Mark A. Holler, Simon M. Tam, Process for fabricating electrically alterable floating gate memory devices ,(1987)
Carlo Bergonzoni, Process for manufacturing CMOS integrated devices with reduced gate lengths ,(1988)
Masao Fujitsu Ltd. Pat.Dep. Taguchi, Takashi Fujitsu Ltd. Pat.Dep. Kato, Three-dimensional integrated circuit and manufacturing method therefor ,(1987)
Carlo Bergonzoni, Fabrication of cmos integrated devices with reduced gate length and lightly doped drain ,(1989)
Heng-Sheng Huang, Method of manufacture of high coupling ratio flash memory cell ,(1994)
Kiyoshi Natsume, Method of making a read only memory device ,(1994)
Woon-kyung Lee, Sung-Bu Jun, Method for manufacturing a semiconductor ROM device ,(1997)