作者: Eun-ha Lee , Keung-hee Jang
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摘要: A method is provided for forming a MOS transistor in highly integrated semiconductor device. In this gate pattern initially formed over substrate. first dielectric film then the at temperature which deformation or oxidation of conductive material prevented. denser second higher than temperature. The and are anisotropically etched sequence to form bi-layered spacers on side walls pattern, including films. Because suppressed by low temperature, resistance electrodes resulting from fabrication process remains low.