Analysis, Design and Simulation of Capacitive Load Balanced Rotary Oscillatory Array
作者： Vinayak Honkote , Baris Taskin
DOI: 10.1109/VLSI.DESIGN.2010.71
关键词:
摘要: The high frequency of the rotary clocking technology is often susceptible to implementation parameters such as variation in total capacitive load distribution between rings. SPICE simulations performed on rings with unbalanced show a 30.31% simulated frequencies across To address this problem, two novel methodologies called OCLB and SOCLB, are formulated for optimal balancing sub-optimal minimized wirelength, respectively. 0.30% Further, SOCLB results an average wirelength improvement 69.24% over relatively balanced distribution. 2.40% rings, improved significantly case.
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