摘要: Rotary clock is a multi-gigahertz distribution technique based on the principle of wave propagation in transmission lines. In this paper, we perform first quantitative investigation power dissipation rotary designs. Specifically, have developed software tool method partial element equivalent circuit (PEEC) that capable extracting SPICE netlist from layout specification design. As result, are able to accurately estimate frequency and design using simulations. Using our tool, uncovered key mechanisms proposed several reduction strategies. Furthermore, analysis has revealed designs can achieve savings up 70% comparison with conventional tree implementations.
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