作者: Vinayak Honkote , Baris Taskin
DOI: 10.1109/ICCD.2010.5647781
关键词: Power factor 、 Synchronization 、 Capacitance 、 Capacitive sensing 、 Electronic engineering 、 Power (physics) 、 Control theory 、 Timing closure 、 Computer science 、 Skew 、 Clock skew
摘要: Rotary clocking is a traveling wave based high-speed resonant technology with low-power and controllable-skew properties. Capacitive load balance bounded clock skew are identified as the primary requirements to maintain stable oscillation frequency across rings achieve timing closure, respectively, in rotary oscillatory array (ROA). Towards this end, two methodologies proposed balanced capacitive loads of ROA constraint. Experiments performed on IBM R1–R5 benchmark circuits show 5.62X improved 3.67% total 6.55% period at 1.8GHz. SPICE simulations that variation reduced from 10.14% 2.12% well. Power dissipated optimization within ±1.5% conventional design automation techniques for synchronization.