A multistandard Σ-Δ fractional-N frequency synthesizer for 802.11a/b/g WLAN
作者： A. Bonfanti , C. Samori , A.L. Lacaita
DOI: 10.1109/ESSCIRC.2007.4430346
关键词:
摘要: A multistandard WLAN fractional-N frequency synthesizer is implemented in 0.13-mum CMOS. The PLL able to generate carrier for 802.11a/b/g and Hiper- LAN2 standards. Given the wide tuning range required, VCO adopts a switched LC tank together with an Adaptive Frequency Calibration (AFC) technique. Measured integral phase noise less than 3deg rms 40-MHz reference spurs are below -40 dBc. Lock time 200 musec. power consumption about 50 mW from 1.2- V supply.
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