Demonstration of a 4 Mb, high density ferroelectric memory embedded within a 130 nm, 5 LM Cu/FSG logic process

作者: T.S. Moise , S.R. Summerfelt , H. McAdams , S. Aggarwal , K.R. Udayakumar

DOI: 10.1109/IEDM.2002.1175897

关键词:

摘要: … drawn) transistors and W plug contacts. Starting at the planar contact level, we employ sputter deposition … A 2ps pulse width and 200 Ohm series resistor was used far this measurement. …

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