作者: Robert Patti , Sangki Hong , Ramasamy Chockalingam
DOI:
关键词:
摘要: A basic building block for wafer scale stacked integrated circuits is disclosed. The includes an circuit device having substrate a layer sandwiched between buffer and dielectric layer. has top side bottom side, the being in contact with surface of plurality pads. Each pad extends above by predetermined distance. pads have dimensions that reduce irregularities In addition, are arranged manner to promote planarization via CMP.