摘要: Undergraduate students in computer science at the University of Brest are learning basics digital circuits by developing their own functional and structural models. The approach is object oriented to aggregate different abstraction levels one single structure. This paper presents how a simple combinatorial sequential circuit can be functionally modeled complex hierarchically built. students' project consists designing logic simulator using Smalltalk environment, which allows them integrate more easily recent research made our lab on synthesis abstract low-level tools for FPGA same approach.