Approximate Reverse Carry Propagate Adder for Energy-Efficient DSP Applications

作者: Masoud Pashaeifar , Mehdi Kamal , Ali Afzali-Kusha , Massoud Pedram

DOI: 10.1109/TVLSI.2018.2859939

关键词:

摘要: In this paper, a reverse carry propagate adder (RCPA) is presented. the RCPA structure, signal propagates in counter-flow manner from most significant bit to least bit; hence, input has higher significance than output carry. This method of propagation leads stability presence delay variations. Three implementations full-adder (RCPFA) cell with different delay, power, energy, and accuracy levels are introduced. The proposed structure may be combined an exact (forward) form hybrid adders tunable accuracy. design parameters some realized utilizing these structures studied compared those state-of-the-art approximate using HSPICE simulations 45-nm CMOS technology. results indicate that employing RCPAs provide, on average, 27%, 6%, 31% improvements energy-delay-product while providing addition, more resilient variation conventional adder. Finally, efficacy investigated discrete cosine transform (DCT) block JPEG compression finite-impulse response (FIR) filter applications. investigation reveals 60% 39% energy saving DCT FIR filter, respectively, for RCPAs.

参考文章(21)
Leonardo Bandeira Soares, Sergio Bampi, Eduardo Costa, Approximate adder synthesis for area- and energy-efficient FIR filters in CMOS VLSI 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS). pp. 1- 4 ,(2015) , 10.1109/NEWCAS.2015.7182095
Zhixi Yang, Jie Han, Fabrizio Lombardi, Transmission gate-based approximate adders for inexact computing international symposium on nanoscale architectures. pp. 145- 150 ,(2015) , 10.1109/NANOARCH.2015.7180603
Ing-Chao Lin, Yi-Ming Yang, Cheng-Chian Lin, High-Performance Low-Power Carry Speculative Addition With Variable Latency IEEE Transactions on Very Large Scale Integration Systems. ,vol. 23, pp. 1591- 1603 ,(2015) , 10.1109/TVLSI.2014.2355217
Jinghang Liang, Jie Han, F. Lombardi, New Metrics for the Reliability of Approximate and Probabilistic Adders IEEE Transactions on Computers. ,vol. 62, pp. 1760- 1771 ,(2013) , 10.1109/TC.2012.146
Vaibhav Gupta, Debabrata Mohapatra, Anand Raghunathan, Kaushik Roy, Low-Power Digital Signal Processing Using Approximate Adders IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. ,vol. 32, pp. 124- 137 ,(2013) , 10.1109/TCAD.2012.2217962
Yongtae Kim, Yong Zhang, Peng Li, An energy efficient approximate adder with carry skip for error resilient neuromorphic VLSI systems international conference on computer aided design. pp. 130- 137 ,(2013) , 10.5555/2561828.2561854
Zhixi Yang, Ajaypat Jain, Jinghang Liang, Jie Han, Fabrizio Lombardi, Approximate XOR/XNOR-based adders for inexact computing international conference on nanotechnology. pp. 690- 693 ,(2013) , 10.1109/NANO.2013.6720793
Thierry Moreau, Adrian Sampson, Luis Ceze, Approximate Computing: Making Mobile Systems More Efficient IEEE Pervasive Computing. ,vol. 14, pp. 9- 13 ,(2015) , 10.1109/MPRV.2015.25
Muhammad Shafique, Waqas Ahmad, Rehan Hafiz, Jörg Henkel, A low latency generic accuracy configurable adder design automation conference. pp. 86- ,(2015) , 10.1145/2744769.2744778
Arjuna Madanayake, Renato J. Cintra, Vassil Dimitrov, Fabio Bayer, Khan A. Wahid, Sunera Kulasekera, Amila Edirisuriya, Uma Potluri, Shiva Madishetty, Nilanka Rajapaksha, Low-Power VLSI Architectures for DCT\/DWT: Precision vs Approximation for HD Video, Biomedical, and Smart Antenna Applications IEEE Circuits and Systems Magazine. ,vol. 15, pp. 25- 47 ,(2015) , 10.1109/MCAS.2014.2385553