作者: Ruilong Xie , Thanh Hoa Phung , Mingbin Yu , Chunxiang Zhu
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摘要: A novel surface passivation technique using silicon nitride (SN) by - treatment has been demonstrated on -gated Ge pMOSFETs. It is found that ultrathin SN more effective to suppress the out diffusion than Si passivation. Improved interface quality and device performance were achieved for with Fluorine (F) incorporation postgate was also implemented further enhance performance. Furthermore, bias temperature instability (BTI) characteristics systematically investigated engineered (Si-, SN-, or -passivated) pMOSFETs both conventional dc fast pulse measurement. The impact of thickness processes (F incorporation) BTI studied, it can be improved reducing incorporating F.