作者: Takashi Ohsawa
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摘要: An intermediate potential generation circuit for outputting an (VM) between a power source (VCC) and ground potential, including reference generator (40) generating first second potentials (VN7, VN8), comparator (41) comparing the output with potentials. When is lower than outputs control signal at level of to MOS transistor (M9) supplied raise level. higher (M10) potential.