Method of etching trenches for metallization of integrated circuit devices with a narrower width than the design mask profile
作者： Nelson Chou San Loke , Mukherjee-Roy Moitreyee , Joseph Xie
DOI:
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摘要: A method of etching trenches through a low-k material layer using hard mask wherein the are sized down from size by without sacrificing vertical trench profile is described. dielectric provided over region to be contacted on substrate. deposited overlying material. formed has first opening width. second etched in where it exposed width smaller than and inwardly sloping sidewalls. whereby equal The filled with metal complete fabrication integrated circuit device.
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